FPGA (Field Programmable Gate Array) is an IC (Integrated Circuit) that can realize various logic functions. A common FPGA has tiles containing a logic block (LB) that perform logic operations and a switch block (SB) with a switchable connection to each LB. These FPGA blocks have a plurality of programmable memories, and by writing to those memories, FPGA can be programmed to provide a logic function based on the written information. In these memories, for example, a volatile SRAM (Static Random Access Memory) can be used to store the written information.
SRAM cells that constitute SRAM arrays are written at the same speed as the switching speed of an inverter and, as long as it continues to receive power, the stored data is retained in the cells. SRAM cells include, for example, six transistors, which causes a relatively large device footprint. In addition, SRAM requires a large amount of power consumption due to the requirement that it be continuously supplied with power; otherwise, it would lose the stored data.
As one method for solving the problem of large power consumption, an FPGA may use various nonvolatile memories, for example, a flash memory. However, the flash memory generally requires a relatively long time to write or erase compared with SRAM. For this reason, a large amount of time and cost is incurred when the flash memory needs to be written or erased, for example, at the time of a logic operation test before shipping, or the like.
In addition, as one method of solving the problem of a large footprint, an FPGA may use DRAM (Dynamic Random Access Memory). Writing to DRAM provides the same operation speed as the transistor switching speed. DRAM also has a relatively small footprint since DRAM cells includes just one transistor and one capacitor.
However, a DRAM loses data due to the leakage current of the transistor, so it is necessary to frequently carry out a refresh operation. This is advantageous in the case of carrying out a logic operation test in which writing and erasing must be completed in a short time; however, it is generally necessary to use a memory that does not need to be refreshed under normal operating conditions since the rewriting of memory may be seldom or rare for normal operation.
It has been proposed to use a DRAM cell in a first instance as a DRAM cell, then convert the DRAM cell to a nonvolatile storage cell by causing damage to the gate of the transistor that constitutes DRAM. However, with this method, writing can only be done once when the device is used as a nonvolatile FPGA because this method employs a destructive technique (i.e., once the transistor gate is damaged, it cannot generally be repaired in the normal course of operation).
Thus, while high speed writing is possible when using SRAM, power consumption becomes an issue when writing is frequent, and the SRAM footprint is large. While it is possible to reduce the footprint by using DRAM, and to eventually make it nonvolatile by a destructive technique, writing can only be done once.